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LTM4613
PIN FUNCTIONS
(See Package Description for Pin Assignments)
V IN (Bank 1): Power Input Pins. Apply input voltage be-
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between V IN pins
and PGND pins.
PGND (Bank 2): Power Ground Pins for Both Input and
Output Returns.
V OUT (Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
output decoupling capacitance directly between these pins
and PGND pins (see the LTM4613 Pin Configuration below).
V D (Pins C1 to C7, B6 to B7, A6): Top FET Drain Pins.
Add more high frequency ceramic decoupling capacitors
between V D and PGND to handle the input RMS current
and reduce the input ripple further.
DRV CC (Pins C10, E11, E12): These pins normally con-
nect to INTV CC for powering the internal MOSFET drivers.
They can be biased up to 6V from an external supply
with about 50mA capability. This improves efficiency at
the higher input voltages by reducing power dissipation
in the module. See the Applications Information section.
INTV CC (Pin A7): This pin is for additional decoupling of
the 5V internal regulator.
PLLIN (Pin A8): External Clock Synchronization Input to the
Phase Detector. This pin is internally terminated to SGND
with a 50k resistor. Apply a clock above 2V and below
INTV CC subject to minimum on-time and minimum off-time
requirements. See the Applications Information section.
FCB (Pin M12): Forced Continuous Input. Connect this pin
to SGND to force continuous synchronization operation
at light load or to INTV CC to enable discontinuous mode
operation at light load.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft-Start
Pin. When the module is configured as a master output,
then a soft-start capacitor is placed on this pin to ground
to control the master ramp rate. A soft-start capacitor can
be used for soft-start turn-on as a standalone regulator.
Slave operation is performed by putting a resistor divider
from the master output to the ground, and connecting the
center point of the divider to this pin. See the Applications
Information section.
MPGM (Pins A12, B11): Programmable Margining In-
put. A resistor from these pins to ground sets a current
that is equal to 1.18V/R. This current multiplied by 10k
will equal a value in millivolts that is a percentage of the
0.6V reference voltage. Leave floating if margining is not
used. See the Applications Information section. To parallel
LTM4613s, each requires an individual MPGM resistor. Do
not tie MPGM pins together.
f SET (Pin B12): Frequency Set Internally to 600kHz at 12V
Output. An external resistor can be placed from this pin
to ground to increase frequency or from this pin to V IN
to reduce frequency. See the Applications Information
section for frequency adjustment.
TOP VIEW
BANK 2 F
V IN A
BANK 1 B
C
D
E
PGND
G
H
J
V OUT K
BANK 3 L
M
V D
SGND
1 2 3 4 5 6 7 8 9 10 11 12
LGA PACKAGE
133-LEAD (15mm × 15mm × 4.32mm)
LTM4613 Pin Configuration
f SET
MARG0
MARG1
DRV CC
V FB
PGOOD
SGND
NC
NC
NC
FCB
4613f
7
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